L64724 LSI Logic Corporation, L64724 Datasheet - Page 110

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

3.7.3 Microcontrol Enable and Configuration (Group 5:APR 520)
3-80
APR 520 contains the enable and configuration mechanism for the
microcontroller.
Read/Write: W
uC Configuration[4:0]
Arbitration_On
Reset_Mode Reset Mode
L64724 Registers
APR
520
D7
Microcontrol Configuration
When a particular bit in the uC Configuration field is set
to 1 or 0, it can be used to enable or disable, respectively,
portions of the flow chart implemented in the
microcontroller program. See
QPSK Demodulator Acquisition and Debugging Tips,”
page
Arbitration On
When the Arbitration_On bit is 1, host microprocessor
accesses to the L64724 status and configuration
registers (Groups 0 to 5) are allowed while the on-chip
uC is running. The host can thus disable the uC by
writing into the Micro_Enable bit while the uC is running.
When the Arbitration_On bit is 0, host uP accesses to the
L64724 status and configuration registers (Groups 0 to 5)
are not allowed while the on-chip uC is running. The host
can then disable the uC when it is running only by writing
into Group 7 (A[2:0] = 0b111). For more details, see the
Group 7 registers description.
When the Reset_Mode bit is 1, the uC does not reset its
instruction pointer to 0 when disabled while running, and
resumes at the instruction it was last decoding when
enabled again.
When the bit is 0, the uC resets its instruction pointer to
0 on being disabled. It also resets all internal scratch pad
registers, uC_status registers (Group 3, APR 17 to 21),
and associated interrupt bits.
uC Configuration [4:0]
B-1, for a sample flowchart.
D3
Section B.1, “L64724
Arbitration
_On
D2
Reset Value: 0x00
Reset_
Mode
D1
Micro_
Enable
D0
[7:3]
2
1