L64724 LSI Logic Corporation, L64724 Datasheet - Page 199

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

Table 8.7
Parameter
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
(Sheet 1 of 2)
t
t
t
t
t
t
t
t
T
t
t
t
t
t
t
t
t
t
t
t
t
t
CYCLE
PWH
PWL
S
H
OD
RWH
WK
SURCS
SUA
HLDA
DCSDTL
HLDD
CYCLE_CS
HLDRCS
WRREC
DCSDTH
DELD
DELLZ
SUD
HLDW
DLY
L64724-75 AC Timing Parameters with Microcontroller Enabled
Description
Clock Cycle for CLK
Clock Pulse Width HIGH
Clock Pulse Width LOW
Input Setup time to CLK
Input Hold to CLK
Output Delay from CLK
Reset Pulse Width HIGH
Wake-Up Time
Delay from COEn
READ Setup Before CSn LOW
A[2:0] Setup Before ASn LOW
A[2:0] Hold After ASn LOW
Data Valid to DTACKn/WAIT
LOW
Write Data Hold After CSn HIGH
Minimum CSn Width
READ Hold After CSn HIGH
Write Recovery Time
CSn HIGH to DTACKn/WAIT
HIGH
CSn LOW to Data Valid
CSn HIGH to Data 3-State
Data Setup Before CSn Change
ASn Hold after CSn LOW
AC Timing
Groups 0–4
Groups 0–4
Groups 0–4
Groups 0–4
Groups 0–4
Groups 0–4
Groups 0–4
Groups 0–4
Register
Groups
–
–
–
–
–
–
–
–
–
–
–
–
–
–
13.3
15.0
17.0
14.0
15.0
Min
280
6.0
6.0
0.0
0.0
0.0
0.0
31
0
4
–
3
–
–
5
–
2
75 MHz
1 cycle
7 ns +
Max
15.0
28.0
24.0
7.3
7.3
28
–
–
–
9
–
–
–
–
–
–
–
–
–
–
–
CLK Cycles
CLK Cycles
CLK Cycles
CLK Cycles
CLK Cycles
CLK Cycles
CLK Cycles
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8-11
1
1
1
1
1
1
1