L64724 LSI Logic Corporation, L64724 Datasheet - Page 46
L64724
Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet
1.L64724.pdf
(294 pages)
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3-16
APR
3
uC_IE7
D7
uC_IE6
The following register diagram shows the bit organization of SMR[31:24].
Descriptions of the bits follow the register diagram. The L64724 clears
all the bits in SMR[31:24] to 0 after a software or a hardware reset.
uC_IE7
uC_IE5
uC_IE4
uC_IE3
uC_IE2
L64724 Registers
D6
uC_IE6
uC_IE5
D5
uC Interrupt 7 Enable
The microprocessor sets the uC_IE7 bit to enable inter-
rupt 7 from the on-chip microcontroller. The microcode
can define the meaning of interrupt 7; therefore this is a
user-programmable interrupt.
uC Interrupt 6 Enable
The microprocessor sets the uC_IE6 bit to enable
interrupt 6 from the on-chip microcontroller. The
microcode can define the meaning of interrupt 6;
therefore, this is a user-programmable interrupt.
uC Interrupt 5 Enable
The microprocessor sets the uC_IE5 bit to enable
interrupt 5 from the on-chip microcontroller. The
microcode can define the meaning of interrupt 5;
therefore, this is a user-programmable interrupt.
uC Interrupt 4 Enable
The microprocessor sets the uC_IE4 bit to enable
interrupt 4 from the on-chip microcontroller. The
microcode can define the meaning of interrupt 4;
therefore, this is a user-programmable interrupt.
uC Interrupt 3 Enable
The microprocessor sets the uC_IE3 bit to enable
interrupt 3 from the on-chip microcontroller. The
microcode can define the meaning of interrupt 3;
therefore, this is a user-programmable interrupt.
uC Interrupt 2 Enable
The microprocessor sets the uC_IE2 bit to enable
interrupt 2 from the on-chip microcontroller. The
microcode can define the meaning of interrupt 2;
therefore, this is a user-programmable interrupt.
uC_IE4
D4
SMR[31:24]
uC_IE3
D3
uC_IE2
D2
uC_IE1
D1
uC_IE0
D0
31
30
29
28
27
26
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