L64724 LSI Logic Corporation, L64724 Datasheet - Page 35
L64724
Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet
1.L64724.pdf
(294 pages)
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Figure 3.2
RESET
2. Set the APR0 and APR1 registers to zero by writing a zero to
Figure 3.3
READ/WRITE
3. Write to the Configuration registers in Group 4.
Figure 3.4
and 0x04 values shown for D[7:0] are typical values for locations 0
and 1, respectively. See
page
L64724 Register Overview
PCLK
Groups 0 and 1. See
Because the APRs were both initialized to zero, the first location
written in Group 4 is location zero, the second location written is 1,
and so on. As long as the address lines A[2:0] contain the value 4,
the auto-increment mechanism advances to the next location in
Group 4 with every low-to-high transition of CSn.
DTACKn
3-33, for more details on the data values.
D[7:0]
A[2:0]
CSn
ASn
and
Issue a Hard Reset
Initialize APR0 and APR1 to Zero
Figure 3.5
3 PCLK Cycles
0
Section 3.6, “Group 4: Configuration Registers,”
show the first two writes to Group 4. The 0x82
Figure
00
3.3.
1
00
3-5
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