L64724 LSI Logic Corporation, L64724 Datasheet - Page 77

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

3.6.13 Synchronization Word (Group 4: APR 14)
For example, a value of VMBEC_7_8[7:0] = 0b0000.0011 specifies
416 errors. For more information, see
Monitor,” page
set to 1) does not affect the contents of the register.
Read/Write: R/W
This register contains the synchronization word used by the
synchronization module in stages two and three. Within this byte, the
MSB is chronologically oldest and the LSB is chronologically newest.
See
Low Data Rates,” page
Word[7:0].
Read/Write: R/W
Group 4: Configuration Registers
APR
APR
13
14
Section B.4, “QPSK Demodulator and FEC Configuration Example:
D7
D7
7-7. Note that a software reset (FEC_RST, APR 55, bit 0
Viterbi Maximum Bit Error Count VMBEC_7_8[7:0], Rate 7/8
B-30, for a typical setting for Synchronization
Synchronization Word[7:0]
Section 7.1.3, “Viterbi BER
D0
D0
3-47