L64724 LSI Logic Corporation, L64724 Datasheet - Page 248

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

B-34
Group 4, APR 24 – Set to 0x54.
Set the PWR_REF[7:0] bits to 0x54. See
Power Reference,” page
Group 4, APR 25 – Set to 0x03.
Clear the D7 through D3 bits to 0, clear the INT_DC bit (D2) to 0 to
disable internal DC offset compensation, and set the PWR_BW[1:0] bits
to 0b11 according to section 5.8.2.
Group 4, APR 26 – Set to 0xBA.
Equation B.38
Equation B.38
Group 4, APR 27 – Set to 0x64.
This register is set to a signal-to-noise threshold value dependent on the
value of the PWR_REF[7:0] value. The SNR_THS[7:0] bits contain a
threshold value that indicates a good or bad signal-to-noise ratio. Set the
SNR_THS[7:0] value to 100 (0x64.)
Group 4, APR 28 – Set to 0x58.
This register defines the loop bandwidths for a particular baud rate. A
good approximation to the equivalent noise bandwidth is given in
Equation B.39
Equation B.39
For a baud rate of 2.0 Mbaud we can choose B
therefore
L64724 Application Notes
SCALE
SCALE
B
B
L
L
=
=
0.003125 BaudRate
--------- - 1
2
=
=
n
n
2047
------------------------------------------------- -
2047
---------------------------------------------------- -
= 25 Krad/s.
+
used to calculate the value of SCALE[7:0].
(for low data rates.)
2 PWR_REF
-------- -
4
1
2
2 84
1
1
+
+
2.51
------ -
N
E
5-20, for more details.
s
o
–
1
–
1
=
186
(0xBA)
Section 5.8.1, “ADC Range and
L
= 15.625 Krad/s and