L64724 LSI Logic Corporation, L64724 Datasheet - Page 16

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

Transport
(MPEG-2
Figure 1.1 L64724 Block Diagram
Channel
1-2
Stream)
Output
Q
I
Clk
N/T
Channel
Satellite
External Microcontroller Interface
Input
from
Dual
ADC
Descrambler
Microcontroller Data and Address Bus
which eliminates interaction from the main CPU, freeing up the CPU to
perform other functions. The number of external components required to
build a system is minimal because both clock and carrier loops are
incorporated into the device.
Introduction
Interpolator/Decimation
Solomon
Decoder
Reed-
FEC Decoder
Pipeline
Filter
Internal Microcontroller Interface
Convolutional
Deinterleaver
Figure 1.1
Microcontroller Data and Address Bus
Timing Loop
Loop Control
Control
Control
Carrier
Syncronizer
AGC
Solomon
Reed-
Matched
is a block diagram of the L64724.
Filter
Synchronizer
Control
Output
Decoder
Demodulator
BPSK/QPSK
Viterbi
Viterbi
DEMI
1/T
DEMQ