L64724 LSI Logic Corporation, L64724 Datasheet - Page 200

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

Table 8.7
1. Guaranteed by design.
Table 8.8
8-12
Parameter
23
24
(Sheet 2 of 2)
Parameter
1
2
3
4
5
6
7
8
9
10
11
12
13
(Sheet 1 of 2)
t
t
DELDTL
RDREC
t
t
t
t
t
t
t
t
TDLY
tSURCS
tSUA
tHLDA
tDCSDTL
CYCLE
PWH
PWL
S
H
OD
RWH
WK
L64724-75 AC Timing Parameters with Microcontroller Enabled (Cont.)
L64724-90 AC Timing Parameters with Microcontroller Disabled
Description
CSn LOW to DTACKn/WAIT
LOW
Read Recovery Time
Description
Clock Cycle for PCLK
Clock Pulse Width HIGH
Clock Pulse Width LOW
Input Setup time to CLK
Input Hold to CLK
Output Delay from CLK
Reset Pulse Width HIGH
Wake-Up Time
Delay from COEn
READ Setup Before CSn LOW
A[2:0] Setup Before ASn LOW
A[2:0] Hold After ASn LOW
Data Valid to DTACKn/WAIT
LOW
L64724 Specifications
Groups 0–4
Groups 0–4
Groups 2, 3
Groups 2, 3
Register
Groups
Groups 0,
Groups 0,
Groups
1, 4
1, 4
–
–
–
–
–
–
–
–
–
–
–
1
Min
11.1
5.25
5.25
15.0
Min
280
0.0
0.0
–
5
0
4
–
3
–
0
–
75 MHz
90 MHz
Max
Max
15.0
15.0
30
6.1
6.1
–
–
–
–
9
–
–
–
–
–
1
CLK Cycles
CLK Cycles
CLK Cycles
CLK Cycles
CLK Cycles
CLK cycles
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2
2
2
2