L64724 LSI Logic Corporation, L64724 Datasheet - Page 49

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

S2_LS
S2_S
S1_LS
Group 2: System Mode and System Status Registers
set in the SMR. The L64724 clears the S3_S bit to 0 after
a reset or a Group 2 (STS) read.
Stage 2 Loss of Synchronization Flag
The L64724 sets the S2_LS bit when the
Deinterleaver/Reed-Solomon Decoder synchronization
module determines that synchronization is lost. The
L64724 also generates an interrupt if the S2_LS_IE bit is
set in the SMR. The L64724 clears the S2_LS bit to 0
after a reset or a Group 2 (STS) read.
Stage 2 Synchronization Flag
The L64724 sets the S2_S bit when the
Deinterleaver/Reed-Solomon Decoder synchronization
module acquires synchronization. The L64724 also
generates an interrupt if the S2_S_IE bit is set in the
SMR. The L64724 clears the S2_S bit to 0 after a reset
or a Group 2 (STS) read.
Stage 1 Loss of Synchronization Flag
The L64724 sets the S1_LS bit when the Viterbi Decoder
synchronization module determines that synchronization
is lost. The L64724 also generates an interrupt if the
S1_LS_IE bit is set in the SMR. The L64724 clears
S1_LS to 0 after a reset or a Group 2 (STS) read.
S2_LS
S1_LS
S2_S
S3_S
0
1
0
1
0
1
0
1
Definition
Stage 2 Synchronization status unchanged
Stage 2 Synchronization acquired
Definition
Stage 1 Synchronization status unchanged
Loss of Stage 1 Synchronization detected
Definition
Stage 3 Synchronization status unchanged
Stage 3 Synchronization acquired
Definition
Stage 2 Synchronization status unchanged
Loss of Stage 2 Synchronization detected
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3
2