L64724 LSI Logic Corporation, L64724 Datasheet - Page 33

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

Figure 3.1
Register
Group
0
1
2
3
4
5
6
7
RESERVED
ARBITER
SMR/STS
CONFIG
MICRO
STATUS
APR0
APR1
Register File Structure
To reduce the number of memory locations occupied by the L64724 in
microprocessor memory, the L64724 uses a pair of Address Pointer
Registers (APR0 and APR1). The Address Pointer Registers have an
auto-increment feature that simplifies the initialization procedure and
reduces the number of memory cycles needed to read or write the
registers. The address pointer and auto-increment features are used
whenever you access Groups 2, 3, and 4. The L64724 automatically
points to the next register entry after you complete an access to one of
the three groups. When writing or reading register groups 3 and 4, it is
easier to initially set APR0 and APR1 to zero and let the auto-increment
mechanism step through all the locations within the group.
For example, to access the PLL_N configuration register 0 (Group 4,
APR 0), first set APR0 and APR1 to 0x00 by writing a zero to addresses
0 and 1, then set A[2:0] to 0b100. The value of 0b100 for address A[2:0]
selects Group 4.
L64724 Register Overview
SMR
STS
0
1
2
3
0
1
2
3
0
1
...
61
69
0
1
2
...
22
23
0
1
...
519
520
0
Group 2:
System Mode/System Status Registers
Group 3:
Status Registers
Group 4:
Configuration Registers
Group 7:
Arbiter Control Register
Group 5:
Microcontrol Registers
3-3