L64724 LSI Logic Corporation, L64724 Datasheet - Page 134

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

5-2
5.1 Overview
Figure 5.1
5.2 Analog to Digital Conversion
Tuner Front End
Amplifier
Control
Loop
Filter
Gain
AGC
Demodulator Module Functional Description
Demodulator Module and Associated Circuitry
Oscillator
External
Crystal
Down
Conv.
I/Q
The Demodulator Module connects to the satellite receiver circuitry
in the set-top box to recover the modulated MPEG-2 transport
stream.
Demodulator and its associated circuitry.
The L64724 incorporates two ADCs at the front end to receive the
incoming analog I and Q data streams. The sampling clock to the
ADC is generated by an on-chip PLL module. An externally applied
signal on the CLK pin drives the PLL. For a detailed description of
the PLL, see
Figure 5.1
ADC
Dual
Chapter 4, "Channel Interfaces and Data Control."
shows the connections between the BPSK/QPSK
Interpolator /
Section
Decimation
PWRP
Demodulator
5.4
L64724
Section
Section
Section
Section
Matched
Control
Carrier
Timing
Filter
Loop
Loop
AGC
5.5
5.6
5.7
5.8
2/T
1/T Outputs
Section
Decoding
Pipeline
to FEC
Control
Output
5.9