L64724 LSI Logic Corporation, L64724 Datasheet - Page 30
L64724
Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet
1.L64724.pdf
(294 pages)
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2-10
1. Serial Mode is the recommended interface mode. LSI Logic does not recommend parallel
mode for new designs.
DTACKn/WAIT
HOST_MODE Serial or Parallel Host Interface Select
INTn
READ/WRITE Read/Write Strobe
L64724 Signal Definitions
Data Acknowledge/Wait
The DTACKn/WAIT signal is an output indicating that the
transaction on the D[7:0] bus has been completed. It is
active-LOW when DTACK/POL is LOW and active-HIGH
when DTACK/POL is HIGH. Do not base the chip pro-
gramming on this signal.
When the HOST_MODE signal is deasserted, it selects
the Serial Host Interface mode. When it is asserted, it
selects the Parallel Host Interface mode
Interrupt
The L64724 asserts the INTn signal (LOW) when an
internal unmasked interrupt flag is set. The INTn signal
remains asserted as long as the interrupt condition
persists and the interrupt flag is not masked.
The microcontroller asserts the READ/WRITE signal
(HIGH) to indicate that the current transaction is a read
from the L64724, and deasserts it (LOW) to indicate that
it is a write to the L64724.
1
.
Output
Output
Input
Input
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