L64724 LSI Logic Corporation, L64724 Datasheet - Page 140

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

5.6 Timing Clock Recovery
Figure 5.3
Samples
5-8
I and Q
Input
ADC
DF_Select
Register
3
Clock Recovery Loop
CLK_USWL
CLK_LWSL
Decimation
Register
Register
DF_Ratio
Register
Figure 5.3
Synchronizer is implemented as an all-digital on-chip module requiring no
external circuitry. The Clock Synchronizer generates the loop control
signals for an internal NCO and interpolator from the L64724 decimation
filter output samples. The main elements in the timing recovery loop are
the interpolators for the I and Q components and the timing error detector.
Demodulator Module Functional Description
Filter
3
DF_GAIN
Register
16
16
2
illustrates the Timing Clock Recovery Loop. The L64724 Clock
CLK_ALPHA_SEL
CLK_SW
Matched Filter/Interpolator
Bit
Interpolator
Resample
Generator
Bit
Control
Sweep
CLK_SWR
CLK_LCF
Register
16
Bit
CLK_BIAS
MF_20_35
Register
30
Bit
CLK_MU_SEL
Loop Filter
Timing Lock
Detector
Register
Timing
Detector
Error
CLK_LAMBDA_SEL
4
Register
4
8
CLK_LC_THSL
Register