L64724 LSI Logic Corporation, L64724 Datasheet - Page 153

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

5.8.2 Power Control Loop
Assuming that the signal power at the input of the ADC is normalized to
1 V
Q signals). The value of PWR_REF is computed from
Equation 5.26
E
power of the desired channel, W
the baud rate.
The L64724 measures the signal power at the output of the matched
filter and compares the measured value to an expected value that the
microcontroller has written into the PWR_REF register.
The microcontroller can adjust the power loop bandwidth using the
PWR_BW[1:0] bits (Group 4, APR 25). The loop bandwidth is
proportional to the value of PWR_BW[1:0] and proportional to the symbol
rate. Set the PWR_BW bits according to
Table 5.5
The power control signal drives the Sigma-Delta modulated output
PWRP. Use the PWRP output to drive an external passive RC filter that
feeds the gain control stage (see
Automatic Gain Control (AGC)
s
is the signal energy, N
2
, the range of the signal (2S) is 2 V (the noise-free level of the I and
PWR_BW[1:0]
0b00
0b01
0b10
0b11
PWR_BW as a Function of Symbol Rate
PWR _ REF
I
is the interference power, P
Symbol Rate (MHz)
=
min 84 84
s
is the bandwidth of the SAW, and R is
Figure
20–45
10–20
5–10
2–5
5.10.)
Table
--------------------------------------------------------------------
1
1
+
+
5.5.
------ -
P
N
------ -
N
E
s
I
s
o
+
–
1
------ -
N
E
s
Equation
s
o
is the signal
DF _GAIN
–
1
W
-------- -
R
5.26.
s
2
5-21