L64724 LSI Logic Corporation, L64724 Datasheet - Page 236

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

B-22
Set Group 4, APR 48 to 0xFA and APR 47 to 0x00.
Group 4, APR 49–52 – Set to 0x12C78301.
Choose CLK_BIAS[30:0] according to
Equation B.35
Fs = sampling frequency at the A/D and Fb is the baud rate.
Set Group 4, APR 52 to 0x12, APR 51 to 0xC7, APR 50 to 83, and
APR 49 to 01.
Group 4, APR 53 – Set to 0x38.
Set the bits in the Clock Loop Configuration register (APR 53) as shown
in
Table B.5
L64724 Application Notes
Bits
D7
D6
D5
D4
D3
D2
D1
D0
Table
CLK_BIAS
CLK_BIAS
Setting
B.5.
0
0
1
1
1
0
0
0
Clock Loop Configuration Register Bits
=
=
50.0 10
--------------------------------------------------- -
F s
---------------------------------------------------------- -
2
CLK_ERROR_SWAP
CLK_SWP_SWAP
CLK_AUTO_SWP
AGC_CLK_SEL
---------------------------- -
DF_RATIO
21.3
CLK_OPEN
2 Fb
Acronym
Reserved
Reserved
CLK_SW
6
1
1 2
10
6
28
2
28
=
315065089
Equation
Meaning
Not significant when auto sweep is
on or when sweep is off
Timing error detector output not
inverted
Automatic internal sweep control
Ser this bit to 1
Integrate over all samples
Clear this bit to 0
Enable the clock loop
Clock sweep off
(0x12C7.8301)
B.35.