L64724 LSI Logic Corporation, L64724 Datasheet - Page 279

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

Table E.1
Mnemonic
LDALR
SRBIT
ADDALR
ADDAMR
SUBAMR
STAR
WTCLKS
(Sheet 2 of 3)
L64724 C Instruction Set (Cont.)
Expansion
Load Acc
Low Register
Set/Reset Bit
Add Acc Low
Register
Add Acc
Middle
Register
Subtract Acc
Middle
Register
Store Acc
Register
Wait Clock
periods
L64724 Microcontroller Instruction Set
Opcode
[11:8]
0011
0100
0101
0110
0111
1000
1001
8-bit register
8-bit register
8-bit register
8-bit register
8-bit register
Datafield
axxxxbcd
unsigned
address
address
address
address
address
[7:0]
8-bit
Description
Load 8 bit register value into accumulator’s
low byte. The register’s address is given as
immediate data in the command’s data field.
Set specified bit in accumulator’s low byte
to given value.
a = value (0 or 1).
bcd = bit position
000 = acc[0], 001 = acc[1],
010 = acc[2], 011 = acc[3],
100 = acc[4], 101 = acc[5],
110 = acc[6], 111 = acc[7].
Add 8-bit unsigned register value to accu-
mulator’s low byte. The added value is
positioned opposite acc[7:0], with no sign
extension. The register’s address is given in
the instruction’s datafield.
Add 8 bit signed register value * 2
mulator[15:0]. The register address is given
in the instruction’s datafield. The register
value is positioned opposite accumulator
bits [15:8] after appropriate sign-extension
(to 24 bits), and zero-padding.
Subtract 8 bit signed register value * 2
from accumulator. The register address is
given in the instruction’s datafield. The reg-
ister value is positioned opposite
accumulator bits [15:8] after appropriate
sign-extension to 24 bits, and zero-padding.
Store accumulator’s low byte - acc[7:0] in
register whose address is given in the
instruction’s datafield.
Wait for specified number of clock periods
before loading next instruction.
The instruction will take the specified num-
ber of clock periods + 2 for execution.
8
to accu-
8
E-3