L64724 LSI Logic Corporation, L64724 Datasheet - Page 60

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L64724

Manufacturer Part Number
L64724
Description
Satellite Receiver
Manufacturer
LSI Logic Corporation
Datasheet

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3.5.10 Viterbi Code Rate (Group 3: APR 14)
3-30
1. The Q portion of the IQ spectrum is inverted and the I portion is not inverted.
Read/Write: R
Reserved
RQ
Read/Write: R
Reserved
IMQ_Active
VCR
L64724 Registers
APR
APR
13
14
D7
D7
Reserved
Reserved
These bits are reserved for LSI Logic internal use only.
When read, they return an indeterminate value.
RQ Read Back
This register displays the value on the RQ[5:0] input bus.
Note that PCLK needs to be running for this feature to
operate properly.
Reserved Bits
These bits are reserved for LSI Logic internal use only.
When read, they return an indeterminate value.
IMQ Mode Active
When the IMQ_Active bit is 1, it Indicates that the state
machine has detected an IMQ inversion
compensating for it automatically.
Viterbi Code Rate
These bits display the Viterbi decoder code rate that was
found during the acquisition process for the convolutional
decoder. The Viterbi Code Rate information in this
register is meaningful only after synchronization has
D6
Reserved
D5
D4
Active
IMQ_
D3
RQ[5:0]
Viterbi Code Rate, VCR[2:0]
D2
Reset Value: 0x00
Reset Value: 0x00
1
and is
D0
D0
[7:6]
[5:0]
[7:4]
[2:0]
3

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