L64724 LSI Logic Corporation, L64724 Datasheet - Page 166

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

Figure 6.12 Minimum and Maximum Number of States in the Acquisition Phase
6-10
Qa
MC
= 0
Pa
Qa
Acquisition Phase (minimum number of states)
Acquisition Phase (maximum number of states)
Qa
From Tracking Phase
Synchronization State: (SSA = 0b00)
MC
= 0
Synchronization State (SSA = 0b11)
MC
= 1
You can configure some of the parameters in the state diagram for the
acquisition and tracking phase. For example, you can set the SSA
parameter (Group 4, APR 16) to allow for three, four, five, or six sync
words before the decoder declares itself to be in synchronization. You
can also set the SST parameter (Group 4, APR 16) to allow for two,
three, four, or five misdetected sync words before the decoder declares
a loss of synchronization.
minimum and maximum number of states that you can select for
acquisition and tracking modes.
Decoding Pipeline Synchronization
Pa
Pa
Qa
From Tracking Phase
Qa
MC
= 1
MC
= 2
Pa
Qa
Qa
Pa
MC
= 2
MC
= 3
Figure 6.12
Pa
Qa
Pa
MSC = 0
Pt
MC
MC = 3
= 4
and
Qa
Pa
Figure 6.13
MC
= 5
Pa
show the
MSC = 0
Pt
MC = 6