L64724 LSI Logic Corporation, L64724 Datasheet - Page 185

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

7.3.3 Performance Analysis
7.4 Descrambler Module Architecture and Operation
The performance of the code against independent random byte errors
can be computed by the equation:
Equation 7.1
where:
N
p
T
q
When more than T byte errors occur in a code word, the RS decoders
usually detect the presence of excessive errors and raise the
uncorrectable error flag to notify the user. However, there is a small
probability that the erroneous decoded code word remains undetected.
The undetected erroneous code word rate is:
Figure 7.10
performs two functions:
Descrambler Module Architecture and Operation
N
i
q
----- -
T !
1
Generates a pseudorandom binary sequence (PRBS) that modifies
the incoming data stream
Properly aligns data with the PRBS
Note:
=
----------------
2
i
m
= Code word length in bytes
= Input byte error rate
= Number of errors to correct
= Output byte error rate
= Binomial coefficient that represents the number of ways of choosing i
items from a collection of N distinct items
=
N
–
N
T
1
+
shows a block diagram of the Descrambler. The Descrambler
1
T
The Descrambler module is used only in the DVB mode of
operation.
--- - N
N
i
i
=
N
T
i
+
1
p
i
N
i
1 p
–
p
i
1 p
N
–
i –
N
i –
7-15