L64724 LSI Logic Corporation, L64724 Datasheet - Page 131

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

ERROROUTn
Figure 4.8
FSTARTOUT
DVALIDOUT
PCLK
CO[0]
Descrambler Serial Output Waveforms
The L64724 outputs one new data bit each PCLK cycle. The L64724
asserts the FSTARTOUT signal for one cycle. The FSTARTOUT signal
overlaps the first message bit of a Reed-Solomon code word. In the
serial output mode, the L64724 chronologically orders the data. The
MSB is the oldest output and the LSB is the newest output.
Note that due to the use of a constant sampling frequency and the
internal demodulator architecture, the output data stream in this mode
contains gaps (when DVALIDOUT is LOW.) The distribution and position
in time of the gaps are governed mainly by the ratio of sampling
frequency and symbol rate chosen. Gaps can occur at any time in the
output data stream.
Data Output Interface
Bit 0
Message
Bit 1
Bit 2
N = Code Word Length
Gap
Check Bytes
Message
4-17