HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 1004
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Price
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Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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22. PCI Controller (PCIC)
The bus master data holding circuit can only store data for one master. For this reason, no bus
master data is stored for any second or subsequent errors if errors occur consecutively.
Bits 31 to 5—Reserved: These bits always return 0 when read. Always write 0 to these bits when
writing.
Bit 4—REQ4 Error (REQ4ID): Error occurred when device 4 (REQ4) was bus master.
Bit 3—REQ3 Error (REQ3ID): Error occurred when device 3 (REQ3) was bus master.
Bit 2—REQ2 Error (REQ2ID): Error occurred when device 2 (REQ2) was bus master.
Bit 1—REQ1 Error (REQ1ID): Error occurred when device 1 (REQ1) was bus master.
Bit 0—REQ0 Error (REQ0ID): Error occurred when device 0 (REQ0) was bus master.
22.2.27 PCI DMA Transfer Arbitration Register (PCIDMABT)
The PCI DMA transfer arbitration register (PCIDMABT) is a register that controls the arbitration
mode in the case of DMA transfers. Two types of DMA arbitration mode can be selected: priority-
fixed and pseudo round-robin. This 32-bit read/write register can be accessed from both the PP bus
and PCI bus.
The PCIDMABT register is initialized to H'00000000 at a power-on reset or software reset.
Always write to this register to specify the DMA transfer arbitration mode prior to starting DMA
transfers.
Rev.4.00 Oct. 10, 2008 Page 904 of 1122
REJ09B0370-0400
PP Bus-R/W:
PP Bus-R/W:
Initial value:
Initial value:
PCI-R/W:
PCI-R/W:
Bit:
Bit:
31
—
—
R
R
R
R
0
7
0
30
—
—
R
R
R
R
6
0
0
29
—
—
R
R
R
R
0
5
0
. . .
. . .
. . .
. . .
. . .
—
R
R
4
0
11
—
—
R
R
R
R
0
3
0
10
—
—
R
R
R
R
0
2
0
—
—
R
R
R
R
9
0
1
0
DMABT
R/W
R/W
—
R
R
8
0
0
0
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