HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 865

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 1—Serial Port Break I/O (SPB0IO): Specifies the serial port TxD pin output condition.
When the TxD pin is actually set as a port output pin and outputs the value set by the SPB0DT bit,
the TE bit in SCSCR1 should be cleared to 0.
Bit 1: SPB0IO
0
1
Bit 0—Serial Port Break Data (SPB0DT): Specifies the serial port RxD pin input data and TxD
pin output data. The TxD pin output condition is specified by the SPB0IO bit (see the description
of bit 1, SPB0IO, for details). When the TxD pin is designated as an output, the value of the
SPB0DT bit is output to the TxD pin. The RxD pin value is read from the SPB0DT bit regardless
of the value of the SPB0IO bit. The initial value of this bit after a power-on reset or manual reset
is undefined.
Bit 0: SPB0DT
0
1
18.2.7
The serial port register (SCSPTR2) is a 16-bit readable/writable register that controls input/output
and data for the port pins multiplexed with the serial communication interface with FIFO (SCIF)
pins. Input data can be read from the RxD2 pin, output data written to the TxD2 pin, and breaks in
serial transmission/reception controlled, by means of bits 1 and 0. SCK2 pin data reading and
output data writing can be performed by means of bits 3 and 2. CTS2 pin data reading and output
Initial value:
Initial value:
R/W:
R/W:
Serial Port Register (SCSPTR2)
Bit:
Bit:
RTSIO
R/W
15
R
0
7
0
Description
SPB0DT bit value is not output to the TxD pin
SPB0DT bit value is output to the TxD pin
Description
Input/output data is low-level
Input/output data is high-level
RTSDT
R/W
14
R
0
6
CTSIO
R/W
13
R
0
5
0
CTSDT
R/W
12
R
0
4
Rev.4.00 Oct. 10, 2008 Page 765 of 1122
SCKIO
R/W
11
R
0
3
0
SCKDT
R/W
10
R
0
2
SPB2IO SPB2DT
REJ09B0370-0400
R/W
R
9
0
1
0
(Initial value)
18. I/O Ports
R/W
R
8
0
0

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