HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 56

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Rev.4.00 Oct. 10, 2008 Page liv of xcviii
REJ09B0370-0400
Item
Appendix A Address
List
Table A.1 Address List
Appendix B Package
Dimensions
Figure B.3 Package
Dimensions (256-pin
BGA)
Appendix C Mode Pin
Settings
Table C.1 Clock
Operating Modes
(SH7751)
Table C.7 PCI Mode
Page
1077 to
1084
1078
1087
1089
1091
Table amended
Revision (See Manual for Details)
Synchronization Clock
Iclk → Ick
Bclk → Bck
Pclk → Pck
Table amended
Module Register
PCIC
Newly added
Table amended and notes added
Notes: 1. The multiplication factor of 1/2 frequency driver is
Mode
0
1
Clock
Operating
Mode
0
1
2
3
4
5
6
PCICR
MD2
0
1
2. For the ranges input clock frequency, see the
0
0
Pin Combination
MD10
External
solely determined by the clock operating mode.
description of the EXTAL clock input frequency (f
and the CKIO clock output (f
Clock and Control Signal Timing.
MD1
0
1
0
1
Pin Value
P4 Address
H'FE20 0100 H'1E20 0100
MD0
0
1
0
1
0
1
0
MD9
0
1
1/2
Frequency
Divider
Off
Off
On
Off
On
Off
Off
Area 7
Address*
*
2
Mode
PCI host with external clock input
PCI host with feedback input clock from CKIO
PLL1
On
On
On
On
On
On
Off
1
PLL2
On
On
On
On
On
On
Off
CPU
Clock
6
6
3
6
3
6
1
OP
(vs. Input Clock)
Bus
Clock
3/2
1
1
2
3/2
3
1/2
) in section 23.3.1,
Frequency
Peripheral
Module
Clock
3/2
1
1/2
1
3/4
3/2
1/2
FRQCR
Initial Value
H'0E1A
H'0E23
H'0E13
H'0E13
H'0E0A
H'0E0A
H'0808
EX
)

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