HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 794

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
16. Serial Communication Interface with FIFO (SCIF)
Bit 6—Serial Port RTS Port Data (RTSDT): Specifies the serial port RTS2 pin input/output
data. Input or output is specified by the RTSIO bit (see the description of bit 7, RTSIO, for
details). In output mode, the RTSDT bit value is output to the RTS2 pin. The RTS2 pin value is
read from the RTSDT bit regardless of the value of the RTSIO bit. The initial value of this bit
after a power-on reset or manual reset is undefined.
Bit 6: RTSDT
0
1
Bit 5—Serial Port CTS Port I/O (CTSIO): Specifies the serial port CTS2 pin input/output
condition. When the CTS2 pin is actually set as a port output pin and outputs the value set by the
CTSDT bit, the MCE bit in SCFCR2 should be cleared to 0.
Bit 5: CTSIO
0
1
Bit 4—Serial Port CTS Port Data (CTSDT): Specifies the serial port CTS2 pin input/output
data. Input or output is specified by the CTSIO bit (see the description of bit 5, CTSIO, for
details). In output mode, the CTSDT bit value is output to the CTS2 pin. The CTS2 pin value is
read from the CTSDT bit regardless of the value of the CTSIO bit. The initial value of this bit
after a power-on reset or manual reset is undefined.
Bit 4: CTSDT
0
1
Bit 3—Serial Port Clock Port I/O (SCKIO): Sets the I/O for the SCK2 pin serial port. To
actually set the SCK2 pin as the port output pin and output the value set in the SCKDT bit, set the
CKE1 and CKE0 bits of the SCSCR2 register to 0.
Bit 3: SCKIO
0
1
Rev.4.00 Oct. 10, 2008 Page 694 of 1122
REJ09B0370-0400
Description
Input/output data is low-level
Input/output data is high-level
Description
CTSDT bit value is not output to CTS2 pin
CTSDT bit value is output to CTS2 pin
Description
Input/output data is low-level
Input/output data is high-level
Description
Shows that the value of the SCKDT bit is not output to the SCK2 pin
Shows that the value of the SCKDT bit is output to the SCK2 pin.
(Initial value)
(Initial value)

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