HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 1057

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Address/Data Stepping Timing: By writing 1 to the WCC bit (bit 7 of the PCICONF1), a wait
(stepping) of one clock can be inserted when the PCIC is driving the AD bus. As a result, the
PCIC drives the AD bus over 2 clocks. This function can be used when there is a heavy load on
the PCI bus and the AD bus does not achieve the stipulated logic level in one clock.
When the PCIC operates as the host, it is recommended to use this function for the issuance of
configuration transfers.
Figure 22.15 is an example of burst memory write cycle with stepping. Figure 22.16 is an example
of target burst read cycle with stepping.
Legend:
Addr: PCI space address
Dn:
AP:
DPn: nth data parity
Com: Command
BEn: nth data byte enable
PCICLK
AD31–AD0
PAR
C/BE3–C/BE0
PCIFRAME
IRDY
DEVSEL
TRDY
nth data
Address parity
Figure 22.15 Master Memory Write Cycle in Host Mode (Burst, With Stepping)
Com
Addr
AP
BE0
D0
DP0
Rev.4.00 Oct. 10, 2008 Page 957 of 1122
DPn-1
22. PCI Controller (PCIC)
BEn
Dn
DPn
REJ09B0370-0400

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