HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 881

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 19.5 Interrupt Request Sources and IPRA–IPRD Registers
Register
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D
Notes: 1. REF is the memory refresh unit in the bus state controller (BSC). See section 13, Bus
As shown in table 19.5, four on-chip peripheral modules are assigned to each register. Interrupt
priority levels are established by setting a value from H'F (1111) to H'0 (0000) in each of the four-
bit groups: 15–12, 11–8, 7–4, and 3–0. Setting H'F designates priority level 15 (the highest level),
and setting H'0 designates priority level 0 (requests are masked).
19.3.2
The interrupt control register (ICR) is a 16-bit register that sets the input signal detection mode for
external interrupt input pin NMI and indicates the input signal level at the NMI pin. This register
is initialized by a power-on reset or manual reset. It is not initialized in standby mode.
Note:
Initial value:
Initial value:
Bit name:
Bit name:
2. Reserved bits: These bits are always read as 0 and should always be written with 0.
*
R/W:
R/W:
Interrupt Control Register (ICR)
Bit:
Bit:
State Controller (BSC), for details.
1 when NMI pin input is high, 0 when low.
NMIL
IRLM
0/1*
R/W
15
R
7
0
R/W
MAI
14
—
—
0
6
0
15–12
TMU0
WDT
GPIO
IRL0
13
—
—
—
—
0
0
5
12
—
—
—
—
0
4
0
11–8
TMU1
REF*
DMAC
IRL1
Rev.4.00 Oct. 10, 2008 Page 781 of 1122
1
11
—
—
—
—
0
3
0
Bits
7–4
SCI1
IRL2
TMU2
SCIF
19. Interrupt Controller (INTC)
10
—
—
—
—
0
2
0
REJ09B0370-0400
NMIB
R/W
—
—
3–0
RTC
Reserved*
H-UDI
IRL3
9
0
1
0
NMIE
R/W
—
—
8
0
0
0
2