HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 102

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

1. Overview
Table 1.1
Item
LSI
CPU
Rev.4.00 Oct. 10, 2008 Page 2 of 1122
REJ09B0370-0400
SH7751/SH7751R Group Features
Features
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Superscalar architecture: Parallel execution of two instructions
External buses (SH buses)
⎯ Separate 26-bit address and 32-bit data buses
⎯ External bus frequency of 1, 1/2, 1/3, 1/4, 1/6, or 1/8 times internal bus
External bus (PCI bus):
⎯ 32-bit address/data multiplexing
⎯ Selection of internal clock or external PCI-dedicated clock
Renesas Technology original SuperH architecture
32-bit internal data bus
General register file:
⎯ Sixteen 32-bit general registers (and eight 32-bit shadow registers)
⎯ Seven 32-bit control registers
⎯ Four 32-bit system registers
RISC-type instruction set (upward-compatible with SuperH Series)
⎯ Fixed 16-bit instruction length for improved code efficiency
⎯ Load-store architecture
⎯ Delayed branch instructions
⎯ Conditional execution
⎯ C-based instruction set
Superscalar architecture (providing simultaneous execution of two
instructions) including FPU
Instruction execution time: Maximum 2 instructions/cycle
Virtual address space: 4 Gbytes (448-Mbyte external memory space)
Space identifier ASIDs: 8 bits, 256 virtual address spaces
On-chip multiplier
Five-stage pipeline
frequency