HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 806

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

16. Serial Communication Interface with FIFO (SCIF)
Serial Data Transmission: Figure 16.8 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Rev.4.00 Oct. 10, 2008 Page 706 of 1122
REJ09B0370-0400
read 1 from TDFE flag and TEND
Write transmit data (16 − transmit
trigger set number) to SCFTDR2,
flag in SCFSR2, then clear to 0
Clear TE bit in SCSCR2 to 0
Read TEND flag in SCFSR2
Read TDFE flag in SCFSR2
Clear SPB2DT to 0 and
All data transmitted?
Start of transmission
End of transmission
set SPB2IO to 1
Break output?
TEND = 1?
TDFE = 1?
Yes
Yes
Yes
Yes
Figure 16.8 Sample Serial Transmission Flowchart
No
No
No
No
1. SCIF status check and transmit data
2. Serial transmission continuation
3. Break output at the end of serial
write:
Read SCFSR2 and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR2, read 1
from the TDFE and TEND flags, then
clear these flags to 0.
The number of transmit data bytes
that can be written is 16− (transmit
trigger set number).
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR2, and then clear the TDFE
flag to 0.
transmission:
To output a break in serial
transmission, clear the SPB2DT bit to
0 and set the SPB2IO bit to 1 in
SCSPTR2, then clear the TE bit in
SCSCR2 to 0.
In steps 1 and 2, it is possible to
ascertain the number of data bytes
that can be written from the number
of transmit data bytes in SCFTDR2
indicated by the upper 8 bits of
SCFDR2.