SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 123

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
EPP SIGNAL
nWRITE
PD<0:7>
INTR
nWAIT
nDATASTB
nRESET
nADDRSTB
PE
SLCT
nERR
Notes:
1. SPP and EPP can use 1 common register.
2. nWrite is the only EPP output that can be over-ridden by SPP control port during an EPP cycle. For correct
EPP read cycles, PCD is required to be a low.
Read Sequence of Operation
■
■
■
■
■
■
■
■
■
The host sets PDIR bit in the control register to a logic “1”. This deasserts nWRITE and tri-states
the PData bus.
The host initiates an I/O read cycle to the selected EPP register.
Chip asserts nDATASTB or nADDRSTRB indicating that PData bus is tri-stated, PDIR is set and
the nWRITE signal is valid.
If nWAIT is asserted, the chip inserts wait states into the I/O read cycle until the peripheral
deasserts nWAIT or a time-out occurs.
The Peripheral drives PData bus valid.
The Peripheral deasserts nWAIT, indicating that PData is valid and the chip may begin the
termination phase of the cycle.
The chip drives the final sync and deasserts nDATASTB or nADDRSTRB.
Peripheral tri-states the PData bus.
Chip may modify nWRITE, PDIR and nPDATA in preparation of the next cycle.
EPP NAME
nWrite
Address/Data
Interrupt
nWait
nData Strobe
nReset
Address Strobe
Paper End
Printer
Selected Status
Error
TYPE
O
I/O
I
I
O
O
O
I
I
I
Table 9.2 EPP Pin Descriptions
EPP DESCRIPTION
This signal is active low. It denotes a write operation.
Bi-directional EPP byte wide address and data bus.
This signal is active high and positive edge triggered. (Pass through
with no inversion, Same as SPP).
This signal is active low.
acknowledgement from the device that the transfer of data is
completed. It is driven active as an indication that the device is
ready for the next transfer.
This signal is active low.
operation.
This signal is active low.
reset to its initial operational mode.
This signal is active low. It is used to denote address read or write
operation.
Same as SPP mode.
Same as SPP mode.
Same as SPP mode.
DATASHEET
107
It is driven inactive as a positive
It is used to denote data read or write
When driven active, the EPP device is
Rev 0.2 (09-28-04)