SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 54

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
RESET
COND.
Bit 6 RESERVED
Always read as a logic “1”.
Bit 7 RESERVED
Always read as a logic “1”.
PS/2 MODEL 30 MODE
Bit 0 nDRIVE SELECT 2
The DS2 disk interface is not supported.
Bit 1 nDRIVE SELECT 3
The DS3 disk interface is not supported.
Bit 2 WRITE GATE
Active high status of the latched WGATE output signal. This bit is latched by the active going edge
of WGATE and is cleared by the read of the DIR register.
Bit 3 READ DATA
Active high status of the latched RDATA output signal. This bit is latched by the inactive going edge
of RDATA and is cleared by the read of the DIR register.
Bit 4 WRITE DATA
Active high status of the latched WDATA output signal. This bit is latched by the inactive going edge
of WDATA and is cleared by the read of the DIR register. This bit is not gated with WGATE.
Bit 5 nDRIVE SELECT 0
Active low status of the DS0 disk interface output.
Bit 6 nDRIVE SELECT 1
The DS 1 disk interface is not supported.
Bit 7 nDRV2
Active low status of the DRV2 disk interface input. Note: This function is not supported.
DIGITAL OUTPUT REGISTER (DOR)
Address 3F2 READ/WRITE
The DOR controls the drive select and motor enables of the disk interface outputs. It also contains
the enable for the DMA logic and a software reset bit. The contents of the DOR are unaffected by a
software reset. The DOR can be written to at any time.
7
nDRV2
N/A
6
nDS1
1
5
nDS0
1
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
4
WDATA
F/F
0
38
3
RDATA F/F
0
2
WGATE
F/F
0
1
nDS3
1
SMSC SCH311X
0
nDS2
1
Datasheet