SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 282

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
24.2.64
24.2.65
24.2.66
Register
Address
Note:
Register
Address
Register
Address
C1h
CAh
C4h
C9h
C5h
Each bit in this register is cleared on a write of 1 if the event is not active.
/Write
Read
R/W
Read/
Read/
R/WC
Write
Write
R/W
R/W
R/W
Register C1h: SMSC Reserved Register
THERMTRIP_CTRL: Bit 1 in the Thermtrip Control register. May be enabled to assert the Thermtrip#
pin if programmed limits are exceeded as indicated by the Thermtrip Status register 1=enable,
0=disable (default)
Registers C4-C5, C9h: THERMTRIP Temperature Limit Zone Registers
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
The nTHERMTRIP pin can be configured to assert when one of the temperature zones is above its
associated THERMTRIP temperature limit (THERMTRIP Temp Limit ZONES 1-3). The THERMTRIP
temperature limit is a separate limit register from the high limit used for setting the interrupt status bits
for each zone.
The THERMTRIP Temp Limit ZONE 1-3 registers represent the upper temperature limit for asserting
nTHERMTRIP pin for each zone. These registers are defined as follows:
If the monitored temperature for the zone exceeds the value set in the associated THERMTRIP Temp
Limit ZONE 1-3 registers, the corresponding bit in the THERMTRIP status register will be set. The
nTHERMTRIP pin may or may not be set depending on the state of the associated enable bits (in the
THERMTRIP Output Enable register).
Note: The zone must exceed the limits set in the associated THERMTRIP Temp Limit ZONE 1-3
Register CAh: THERMTRIP Status Register
Note: This register is reset to its default value when the PWRGD_PS signal transitions high.
This register holds a bit set until the bit is written to 1 by software. The contents of this register are
cleared (set to 0) automatically by the device after it is written by software, if the nTHERMTRIP pin is
no longer active. Once set, the Status bits remain set until written to 1, even if the nTHERMTRIP pin
is no longer active.
Thermtrip Control
THERMTRIP Temp Limit ZONE 1
THERMTRIP Temp Limit ZONE 2
THERMTRIP Temp Limit ZONE 3
Register Name
register for two successive monitoring cycles in order for the nTHERMTRIP pin to go active
(and for the associated status bit to be set).
THERMTRIP Status
Register Name
(Remote Diode 1)
(Remote Diode 2)
Register Name
(Ambient)
(MSb)
Bit 7
RES
(MSb)
Bit 7
DATASHEET
RES
Bit 6
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
RES
(MSb)
Bit 7
7
7
7
266
Bit 6
RES
Bit 5
Bit 6
RES
6
6
6
Bit 5
RES
Bit 4
RES
Bit 5
5
5
5
Bit 4
RES
Bit 3
Bit 4
RES
4
4
4
Bit 3
RES
Bit 3
3
3
3
Bit 2
RES
Bit 2
Bit 2
RD 2
2
2
2
THERM
TRIP_C
Bit 1
TRL
Bit 1
Bit 1
RD 1
1
1
1
(LSb)
Bit 0
RES
(LSb)
SMSC SCH311X
Bit 0
(LSb)
Bit 0
AMB
0
0
0
Datasheet
Default
Default
Value
Default
Value
Value
7Fh
7Fh
7Fh
01h
00h