SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 49

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
6.3.2
Reset Policy
The following rules govern the reset policy:
■
■
1. The host drives the LFRAME# signal high, tristates the LAD[3:0] signals, and ignores the LDRQ#
2. The SCH311X ignores LFRAME#, tristates the LAD[3:0] pins and drives the LDRQ# signal inactive
When PCI_RESET# goes inactive (high), the PCI clock is assumed to have been running for
100usec prior to the removal of the reset signal, so that everything is stable. This is the same
reset active time after clock is stable that is used for the PCI bus.
When PCI_RESET# goes active (low):
signal.
(high).
DATASHEET
33
Rev 0.2 (09-28-04)