SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 223

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
23.13.4
RRX-
[2:0]
111
Ramping Duty Cycle
Calculate Duty Cycle
PWM Duty Cycle
Ramping Duty Cycle
Calculate Duty Cycle
PWM Duty Cycle
Example 1: PWM period < Ramp Rate Step Size
PWM frequency = 87.7Hz (11.4msec) & PWM Ramp Rate = 38.46Hz (26msec)
Example 2: PWM period > Ramp Rate Step Size
PWM frequency = 11Hz (90.9msec) & PWM Ramp Rate = 38.46Hz (26msec)
Notes:
■
■
It should be noted that the actual duty cycle on the pin is created by the PWM Ramp Rate Control
block and latched on the rising edge of the PWM output. Therefore, the current PWM duty cycle may
lag the PWM Calculated Duty Cycle.
Operation of PWM Pin Following a Power Cycle
This device has special features to control the level and operation of the PWM pin following a Power
Cycle. These features are PWM Clamping and Forced Spinup.
PWM RAMP TIME (SEC)
(TIME FROM 33% DUTY
CYCLE TO 100% DUTY
The PWM Duty Cycle latches the Ramping Duty Cycle on the rising edge of the PWM output.
The calculated duty cycle, ramping duty cycle, and the PWM output duty cycle are asynchronous
to each other, but are all synchronized to the internal 90kHz clock source.
CYCLE)
0.8
Figure 23.7 Illustration of PWM Ramp Rate Control
70h
70h
70h
70h
70h
70h
Table 23.4 PWM Ramp Rate (continued)
11.4ms
71h
71h
PWM RAMP TIME (SEC)
71h
CYCLE TO 100% DUTY
26ms
(TIME FROM 0% DUTY
26ms
71h
DATASHEET
11.4ms
CYCLE)
71h
1.275
74h
74h
207
11.4ms
72h
72h
72h
26ms
26ms
71h
90.9msec
11.4ms
72h
11.4ms
73h
(PWM STEP SIZE =
PWM STEP
73h
73h
TIME PER
11.4ms
73h
5 msec
1/255)
11.4ms
73h
74h
11.4ms
74h
74h
Rev 0.2 (09-28-04)
RAMP RATE
74h
11.4ms
74h
PWM
(HZ)
200
74h