SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 200

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
21.2.2
21.2.3
Under VTR Power
If the battery voltage drops below approximately 2.2V under VTR power (VCC off) then the LOW_BAT
PME and SMI Status bits will be set upon a VCC POR. The corresponding enable bit (and other
associated enable bits) must be set to generate a PME or an SMI.
If the PME enable bit (and other associated enable bits) were set prior to VCC going away, then the
low battery event will generate a PME when VCC becomes active again. It will not generate a PME
under VTR power and will not cause a wakeup event.
If the SMI enable bit (and other associated enable bits) were set prior to VCC going away, then the
low battery event will generate an SMI when VCC becomes active again.
Under VCC Power
The LOW_BAT PME and SMI bits are not set when the part is under VCC power. They are only set
upon a VCC POR. See the
Section
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
21.2.2.
184
SMSC SCH311X
Datasheet