SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 296

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
Interrupt Select
Defaults:
0x70 = 0x00 or 0x06
(Note
on VCC POR, VTR POR, PCI
RESET and
SOFT RESET
0x72 = 0x00,
on VCC POR, VTR POR, PCI
RESET and
SOFT RESET
DMA Channel Select
Default = 0x02 or 0x04
(Note
on VCC POR, VTR POR, PCI
RESET and
SOFT RESET
32-Bit Memory Space
Configuration
Logical Device
Logical Device Configuration
Reserved
LOGICAL DEVICE
25.6)
25.7)
REGISTER
Note 25.4 A logical device will be active and powered up according to the following equation unless
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
The Logical device’s Activate Bit and its Pwr/Control Bit are linked such that setting or clearing one
sets or clears the other.
Note 25.5 If the I/O Base Addr of the logical device is not within the Base I/O range as shown in the
Note 25.6 The default value of the Primary Interrupt Select register for logical device 0 is 0x06.
Note 25.7 The default value of the DMA Channel Select register for logical device 0 (FDD) is 0x02
otherwise specified:
Logical Device I/O map, then read or write is not valid and is ignored.
and for logical device 3 and 5 is 0x04.
Table 25.6 Logical Device Registers (continued)
(0xA9-0xDF)
(0xE0-0xFE)
(0x76-0xA8)
(0x70,0x72)
(0x71,0x73)
(0x74,0x75)
ADDRESS
0xFF
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
0x70 is implemented for each logical device. Refer to
Interrupt Configuration Register description. Only the
keyboard controller uses Interrupt Select register 0x72.
Unused register (0x72) will ignore writes and return zero
when read. Interrupts default to edge high (ISA
compatible).
Reserved - not implemented. These register locations
ignore writes and return zero when read.
Only 0x74 is implemented for FDC and Parallel port. 0x75
is not implemented and ignores writes and returns zero
when read. Refer to DMA Channel Configuration.
Reserved - not implemented. These register locations
ignore writes and return zero when read.
Reserved - not implemented. These register locations
ignore writes and return zero when read.
Reserved – Vendor Defined (see SMSC defined Logical
Device Configuration Registers).
Reserved
280
DESCRIPTION
SMSC SCH311X
Datasheet