SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 172

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

APPLICATION NOTE: The Wake on Specific Mouse Click feature requires use of the M_ISO bit in the KRST_GA20
Rev 0.2 (09-28-04)
15.5
The SPESME SELECT field in the
rout ed t o th e
Mouse_Specific_Wake
The Lock bit in the
to prevent tampering with the Wake on Mouse settings. The other bits in the
Register are VBAT powered and reset on VBAT POR; therefore, the mouse event settings are
maintained through a power failure. The lock bit also controls access to the
The
a double mouse click. The value is the time interval between mouse clicks. For example, if
is set to 0.5 seconds, you have one half second to click twice for a double-click.
The larger the value in the
click for the SCH311X to interpret the two clicks as a double-click mouse wake event. If the
value is set to a very small value, even quick double clicks may be interpreted as two single clicks.
The
click interval between 0.0859375 and 5.5 seconds. Each incremental digit has a weight of 0.0859375
seconds.
The
is maintained through a power failure. The default setting provides a 1.03125 second time interval.
DBLCLICK
the Mouse Wake-up state machines.The SPEMSE_EN bit in of the CLOCKI32 configuration register
at 0xF0 in Logical Device A is used to control the “Wake on Specific Mouse Click” feature. This bit
is used to turn the logic for this feature on and off. It will disable the 32KHz clock input to the logic.
The logic will draw no power when disabled. The bit is defined as follows:
0= "Wake on Specific Mouse Click" logic is on (default)
1= "Wake on Specific Mouse Click" logic is off
The generation of a PME for this event is controlled by the PME enable bits (SPEMSE_EN bit in the
PME_EN6
15.5, "Wake on Specific Mouse Click," on page
When using the wake on specific mouse event, it may be necessary to isolate the Mouse Port signals
(MCLK, MDAT) from the 8042 prior to entering certain system sleep states. This is due to the fact
that the normal operation of the 8042 can prevent the system from entering a sleep state or trigger
false PME events. SCH311X has an “isolation” bit for the mouse signals, which allows the mouse data
signals to go into the wake-up logic but block the clock and data signals from the 8042.
When the mouse isolation bit are used, it may be necessary to reset the 8042 upon exiting the sleep
state. If M_SIO bit is set prior to entering a sleep state where VCC goes inactive (S3-S5), then the
8042 must be reset upon exiting the sleep mode. Write 0x40 to global configuration register 0x2C to
reset the 8042. The 8042 must then be taken out of reset by writing 0x00 to register 0x2C since the
bit that resets the 8042 is not self-clearing. Caution: Bit 6 of configuration register 0x2C is used to put
the 8042 into reset - do not set any of the other bits in register 0x2C, as this may produce undesired
results.
Wake on Specific Mouse Click
DBLCLICK
DBLCLICK
DBLCLICK
register. SMSC Application Note 8.8 titled “Keyboard and Mouse Wake-up Functionality”.
register and in the
Writing to the
Register is VBAT powered and reset on VBAT POR; therefore, the double click setting
register contains a numeric value that determines the time interval used to check for
register has a six bit weighted sum value from 0 to 0x3Fh which provides a double
PME_STS6
Mouse_Specific_Wake
Register can swap the Mouse port and Keyboard interfaces internally.
DBLCLICK
DBLCLICK
SMI_EN2
if e nab led by PME_EN6. The KB_MSE_SWAP bit in the
DATASHEET
register shall reset the Mouse Wake-up internal logic and initialize
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Mouse_Specific_Wake
Register, the longer you can wait between the first and second
register) when the logic for feature is turned on. See
156
Register provides a means of changing access to read only
156.
Register selects which mouse event is
DBLCLICK
Mouse_Specific_Wake
SMSC SCH311X
Register.
DBLCLICK
DBLCLICK
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