SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 45

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
Chapter 5 SIO Overview
SMSC SCH311X
5.1
5.2
Base+(0-3), +(400-402)
Base+(0-7), +(400-402)
Base+(0-5) and +(7)
Base1 + (0-7F)
Base2 + (0-1F)
The SCH311X is a Super I/O Device with hardware monitoring. The Super I/O features are
implemented as logical devices accessible through the LPC interface. The Super I/O blocks are
powered by VCC, VTR, or Vbat. The Hardware Monitoring block is powered by HVTR and is
accessible via the LPC interface. The following chapters define each of the functional blocks
implemented in the SCH311X, their corresponding registers, and physical characteristics.
This chapter offers an introduction into the Super I/O functional blocks, registers and host interface.
Details regarding the hardware monitoring block are defined in later chapters. The block diagram in
PME_STS1 further details the layout of the device. Note that the Super I/O registers are implemented
as typical Plug-and-Play components.
The address map, shown below in
I/O immediately after power up. The base addresses of all the Super I/O Logical Blocks, including the
configuration register block, can be moved or relocated via the configuration registers.
Note: Some addresses are used to access more than one register.
The host processor communicates with the Super I/O features in the SCH311X through a series of
read/write registers via the LPC interface. The port addresses for these registers are shown in
Table 5.1, "Super I/O Block
transfers. All registers are 8 bits wide.
Super I/O Registers
Host Processor Interface (LPC)
ADDRESS
Base+(0-3)
Base+(0-7)
Base+(0-7)
Base+(0-7)
Base+(0-7)
60, 64
na
na
na
na
Table 5.1 Super I/O Block Addresses
Addresses". Register access is accomplished through I/O cycles or DMA
Security Key Registers
Runtime Registers
Serial Port Com 1
Serial Port Com 2
Serial Port Com 3
ECP+EPP+SPP
BLOCK NAME
DATASHEET
Table 5.1
Parallel Port
Floppy Disk
Reserved
Reserved
Reserved
Reserved
KYBD
ECP
SPP
EPP
29
shows the addresses of the different blocks of the Super
LOGICAL DEVICE
8,9
0
4
5
7
A
B
1
2
3
6
Rev 0.2 (09-28-04)
(Note
(Note
(Note
(Note
NOTES
5.5)
5.5)
5.2)
5.3)