SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 186

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
SLP_Sx#
PW RGD_PS
nFPRST
PB_IN#
Notes:
■
■
The PS_ON# level will be latched in the Previous State bit located in the Power Recovery Register
on the falling edge of VTR PWR_GD, VCC PWR_GD, or PWR_OK, which ever comes first. If
mode 1 is enabled, this bit will be used to determine the Previous State.
The Previous state is equal to the Previous State bit located in the Power Recover Register, if
configured for Mode 1. If mode 2 is enabled, the Previous state is determined by one of the bits
PB_IN#
Previous State
VTR PW R_GD
modified logic for
Keyboard Power
APF Bit[0]
APF Bit[1]
Controller w/
board
troller
Con-
Keyboard
Key-
Button
wake up sources
2
Other Sx
Figure 20.1 Power Control Block Diagram
Specific Key
KB_PB_STS
Pulse W idth >
debounce
W ake On
0.5 sec.
ckt
Specific Key
W ake On
Power Failure Recovery Logic
Power Supply On Logic
(VTR)
SPEKEY
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
KB_EN
PB_EN
Min 1 sec delay
PW ROK
170
Generator Sources
PME_STS6
(Sticky bits)
PME_EN6
(VTR)
Other Reset
(Vbat)
PB_OUT# Control Logic
0=Off
1=On
Generation
nIO_PME W akeup
PFR_EN
D
Reset
L
Logic
SET
CLR
Q
Q
Delay
Sampled PS_ON# Value
combina-
(battery powered)
Pulse W idth > 0.5 sec
0=OFF, 1=ON
torial
logic
PW RGD_OUT
nIO_PME
PB_OUT#
PS_ON#
SMSC SCH311X
Datasheet