SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 157

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
13.2
40.
105
PIN #
Note 13.1 These pins are inputs to VCC and VTR powered logic.. The logic for the GPIO is on VCC
Note 13.2 This pin’s primary function (power up default function) is not GPIO function; however, the
Note 13.3 Not all alternate functions are available in all SCH311X devices. Refer to
Note 13.4 The PME is for the RI signal only. Note that this may not be available for all SCH311X
Each GPIO port has a 1-bit data register and an 8-bit configuration control register. The data register
for each GPIO port is represented as a bit in one of the 8-bit GPIO DATA Registers, GP1 to GP6. The
bits in these registers reflect the value of the associated GPIO pin as follows. Pin is an input: The bit
is the value of the GPIO pin. Pin is an output: The value written to the bit goes to the GPIO pin.
Latched on read and write. All of the GPIO registers are located in the PME block see
"Runtime Register," on page
register addresses are listed in
Description
GP67
GP67 / nRTS4
ALTERNATE FUNCS)
(DEFAULT FUNC/
- it is also a wake event which goes to VTR powered logic.
pin can be configured a GPIO Alternate function.
“SCH311X General Purpose I/O Port Assignments,” on page 142
devices. Refer to
page 142
PIN NAME
GPIO PIN
Table 13.1 GPIO Pin Functionality (continued)
for more details.
293. The GPIO ports with their alternate functions and configuration state
Table 13.2, “SCH311X General Purpose I/O Port Assignments,” on
Table
DATASHEET
VTR
13.2.
PWRWELL
GPIO
141
0x01
POR
VTR
SMI/PME
for more details.
13.3
Rev 0.2 (09-28-04)
NOTE
Chapter 26,
Table 13.2,