SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 239

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SCH3112I-NE

Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
23.14.3
23.14.4
23.15
23.15.1
High Frequency PWM Options
Locked Rotor Support for Tachometer Inputs
All tachometer inputs support locked rotor input mode. In this mode, the tachometer input pin is not
used as a tachometer signal, but as a level signal. The active state of this signal (high or low) is the
state that the fan’s locked rotor signal indicates the locked condition.
The locked rotor signals that are supported are active high level and active low level. They are
selectable for each tachometer. If the pin goes to its programmed active state, the associated interrupt
status bit will be set. In addition, if properly configured, the nHWM_INT pin can be made to go active
when the status bit is set.
The locked rotor input option is configured through the following bits:
These bits are defined as follows:
Linking Fan Tachometers to PWMs
The TACH/PWM Association Register at offset 81h is used to associate a Tachometer input with a
PWM output. This association has three purposes:
1. The auto fan control logic supports a feature called SpinUp Reduction. If SpinUp Reduction is
2. To measure the tachometer input in Mode 2, the tachometer logic must know when the associated
3. Inhibit fan tachometer interrupts when the associated PWM is ‘OFF’.
See the description of the PWM_TACH register. The default configuration is:
PWM1 -> FANTACH1.
PWM2 -> FANTACH2.
PWM3 -> FANTACH3.
Note: If a FANTACH is associated with a PWM operating in high frequency mode (see the Zonex
Note: If a fan with a tachometer output is driven by the high frequency PWM option, the tachometer
PWM Frequencies Supported
The SCH311X supports low frequency and high frequency PWMs. The low frequency options are
11.0Hz, 14.6Hz, 21.9Hz, 29.3Hz, 35.2Hz, 44.0Hz, 58.6Hz and 87.7Hz. The high frequency options are
15kHz, 20kHz, 25kHz and 30kHz. All PWM frequencies are derived from the 14.318MHz clock input.
Tach1 Mode, bits[7:6] of Tach 1-3 Mode register.
Tach2 Mode, bits[5:4]of Tach 1-3 Mode register.
Tach3 Mode, bit[3:2] of Tach 1-3 Mode register.
00=normal operation (default)
01=locked rotor mode, active high signal
10=locked rotor mode, active low signal
11=undefined.
enabled (SUREN bit), the auto fan control logic will stop driving the PWM output high if the
associated TACH input is operating within normal parameters. (Note: SUREN bit is located in the
Configuration Register at offset 7Fh)
PWM is ‘ON’.
Range/FANx Frequency registers (5Fh-61h)) the tach monitoring logic must be configured for
Mode 1 (see Bit[3] Mode in FANTACHx Option Registers, 90h-92h).
must be monitored in Mode 1 only.
DATASHEET
223
Rev 0.2 (09-28-04)

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