SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 191

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
20.4
20.5
20.5.1
PB_IN#
PB_OUT#
SLP_Sx#
PS_ON#
VCC
VTR
nRSMRST signal is the reset output for the ICH resume well. This signal is used as a power on reset
signal for the ICH.
The SCH311X detects when VTR voltage raises above PME_STS1, provides a delay before
generating the rising edge of nRSMRST. See
page 175
The SCH311X has logic to detect a keyboard make/break scan codes that may be used for wakeup
(PME generation). The scan codes are programmed in the Keyboard Scan Code Registers, located
in the runtime register block, from offset 0x5F to 0x63 from the base address located in the primary
base I/O address in Logical Device A. These registers are powered by Vbat and are reset on a Vbat
POR.
The following sections will describe the format of the keyboard data, the methods that may be used to
decode the make codes, and the methods that may be used to decode the break codes.
The Wake on Specific Key Code feature is enabled for the assertion of the nIO_PME signal when in
SX power state or below See PME_STS1.
Keyboard Data Format
Data transmissions from the keyboard consist of an 11-bit serial data stream. A logic 1 is sent at an
active high level. The following table shows the functions of the bits.
Resume Reset Signal Generation
Keyboard Power Button
Figure 20.5 Power Supply After Power Failure (Return to On)
for a detailed description of how the nRSMRST signal is generated.
Power Failure
DATASHEET
175
Section 20.4, "Resume Reset Signal Generation," on
Rev 0.2 (09-28-04)