SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 128

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
Mode 011 (ECP FIFO - Address/RLE)
A data byte written to this address is placed in the FIFO and tagged as an ECP Address/RLE. The
hardware at the ECP port transmits this byte to the peripheral automatically. The operation of this
register is only defined for the forward direction (direction is 0). Refer to PME_STS1, located in
PME_STS1 of this data sheet.
DEVICE STATUS REGISTER (DSR)
ADDRESS OFFSET = 01H
The Status Port is located at an offset of ‘01H’ from the base address. Bits0 - 2 are not implemented
as register bits, during a read of the Printer Status Register these bits are a low level. The bits of the
Status Port are defined as follows:
Bit 3 nFault
The level on the nFault input is read by the CPU as bit 3 of the Device Status Register.
Bit 4 Select
The level on the Select input is read by the CPU as bit 4 of the Device Status Register.
Bit 5 PError
The level on the PError input is read by the CPU as bit 5 of the Device Status Register. Printer Status
Register.
Bit 6 nAck
The level on the nAck input is read by the CPU as bit 6 of the Device Status Register.
Bit 7 nBusy
The complement of the level on the BUSY input is read by the CPU as bit 7 of the Device Status
Register.
DEVICE CONTROL REGISTER (DCR)
ADDRESS OFFSET = 02H
The Control Register is located at an offset of ‘02H’ from the base address. The Control Register is
initialized to zero by the RESET input, bits 0 to 5 only being affected; bits 6 and 7 are hard wired low.
Bit 0 STROBE - STROBE
This bit is inverted and output onto the nSTROBE output.
Bit 1 AUTOFD - AUTOFEED
This bit is inverted and output onto the nAutoFd output. A logic 1 causes the printer to generate a
line feed after each line is printed. A logic 0 means no autofeed.
Bit 2 nINIT - INITIATE OUTPUT
This bit is output onto the nINIT output without inversion.
Bit 3 SELECTIN
This bit is inverted and output onto the nSLCTIN output. A logic 1 on this bit selects the printer; a
logic 0 means the printer is not selected.
Bit 4 ackIntEn - INTERRUPT REQUEST ENABLE
The interrupt request enable bit when set to a high level may be used to enable interrupt requests
from the Parallel Port to the CPU due to a low to high transition on the nACK input. Refer to the
description of the interrupt under Operation, Interrupts.
Rev 0.2 (09-28-04)
112
SMSC SCH311X
DATASHEET