SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 202

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
(WRITE-LOCK)
REGISTER OFFSET
BIT[2]
0
0
1
1
Access to the Security Key register block is controlled by bits [2:1] of the Security Key Control (SKC)
Register located in the Configuration Register block, Logical Device A, at offset 0xF2. The following
table summarizes the function of these bits.
Note: When Bit[1] (Read-Lock) is ‘1’ all reads to this register block will return 00h.
■
Table 22.2 Description of Security Key Control (SKC) Register Bits[2:1]
(HEX)
As an added layer of protection, bit [0] SKC Register Lock bit has been added to the Security Key
Control Register. This lock bit is used to block write access to the Write-Lock and Read-Lock bits
defined in the table above. Once this bit is set it can only be cleared by a VTR POR, VCC POR,
and PCI Reset. See PME_STS1 for the definition of the Security Key Register.
1C
1D
1A
1B
1E
1F
Table 22.1 Security Key Register Summary (continued)
(READ-LOCK)
BIT[1]
0
1
0
1
VBAT POR
DATASHEET
0x00
0x00
0x00
0x00
0x00
0x00
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Security Key Bytes[31:0] are read/write registers
Security Key Bytes[31:0] are Write-Only registers
Security Key Bytes[31:0] are Read-Only registers
Security Key Bytes[31:0] are not accessible. All reads/write
access is denied.
186
DESCRIPTION
Security Key Byte 26
Security Key Byte 27
Security Key Byte 28
Security Key Byte 29
Security Key Byte 30
Security Key Byte 31
REGISTER
SMSC SCH311X
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