SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 48
SCH3112I-NE
Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.SCH3112I-NE.pdf
(396 pages)
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Rev 0.2 (09-28-04)
6.3
6.3.1
Bus Master Memory Write
Bus Master Memory Write
Bus Master Memory Write
Bus Master Memory Read
Bus Master Memory Read
Bus Master Memory Read
Bus Master I/O Read
Bus Master I/O Read
Bus Master I/O Read
Bus Master I/O Write
Bus Master I/O Write
Bus Master I/O Write
CYCLE TYPE
DMA Read
DMA Read
DMA Read
DMA Write
DMA Write
DMA Write
The LPC interface conforms to the “Low Pin Count (LPC) Interface Specification” . The following section
will review any implementation specific information for this device.
SYNC Protocol
The SYNC pattern is used to add wait states. For read cycles, the SCH311X immediately drives the
SYNC pattern upon recognizing the cycle. The host immediately drives the sync pattern for write
cycles. If the SCH311X needs to assert wait states, it does so by driving 0101 or 0110 on LAD[3:0]
until it is ready, at which point it will drive 0000 or 1001. The SCH311X will choose to assert 0101 or
0110, but not switch between the two patterns.
The data (or wait state SYNC) will immediately follow the 0000 or 1001 value. The SYNC value of
0101 is intended to be used for normal wait states, wherein the cycle will complete within a few clocks.
The SCH311X uses a SYNC of 0101 for all wait states in a DMA transfer.
The SYNC value of 0110 is intended to be used where the number of wait states is large. This is
provided for EPP cycles, where the number of wait states could be quite large (>1 microsecond).
However, the SCH311X uses a SYNC of 0110 for all wait states in an I/O transfer.
The SYNC value is driven within 3 clocks.
Device Specific Information
Table 6.1 Supported LPC Cycles (continued)
TRANSFER SIZE
DATASHEET
1 Byte
2 Byte
4 Byte
1 Byte
2 Byte
4 Byte
1 Byte
2 Byte
4 Byte
1 Byte
2 Byte
4 Byte
1 Byte
2 Byte
4 Byte
1 Byte
2 Byte
4 Byte
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
32
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
COMMENT
Supported
Supported
Supported
Supported
SMSC SCH311X
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