SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 262

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SCH3112I-NE

Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Rev 0.2 (09-28-04)
24.2.18
Register
Address
62h
63h
/Write
Read
R/W
R/W
Note: The range numbers will be used to calculate the slope of the PWM ramp up. For the fractional
Register 62h, 63h: Min/Off, PWM Ramp Rate Control
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Description of OFFx bits:
The OFFx Bits [7:5] specify whether the duty cycle will be set to 0% or the Minimum Fan Duty Cycle
when the measured temperature falls below the Temperature LIMIT register setting. OFF1 applies to
PWM1, OFF2 applies to PWM2, and OFF3 applies to PWM3.
Description of Ramp Rate Control bits:
If the Remote1 or Remote2 pins are connected to a processor or chipset, instantaneous temperature
spikes may be sampled by the part. The auto fan control logic calculates the PWM duty cycle for all
temperature readings. If Ramp Rate Control is disabled, the PWM output will jump or oscillate
between different PWM duty cycles causing the fan to suddenly change speeds, which creates
unwanted fan noise. If enabled, the PWM Ramp Rate Control logic will prevent the PWM output from
jumping, instead the PWM will ramp up/down towards the new duty cycle at a pre-determined ramp
rate.
Ramp Rate Control
The Ramp Rate Control logic limits the amount of change to the PWM duty cycle over a period of time.
This period of time is programmable via the Ramp Rate Control bits. For a detailed description of the
Table 24.11 PWM output below Limit depending on value of Off/Min
Min/Off, PWM 1 Ramp Rate
PWM 2, PWM 3 Ramp Rate
Table 24.10 Register Setting vs. Temperature Range (continued)
entries, the PWM will go on full when the temp reaches the next integer value e.g., for 3.33,
PWM will be full on at (min. temp + 4).
RAN[3:0]
Register Name
OFF/MIN
1000
1001
1010
0111
1011
1100
1101
1110
1111
Control
Control
0
1
(MSb)
RR2E
OFF3
Bit 7
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
RR2-2
OFF2
Bit 6
246
At 0% duty below LIMIT
At Min PWM Duty below LIMIT
RR2-1
OFF1
Bit 5
RR2-0
Bit 4
RES
RR1E
RR3E
Bit 3
PWM ACTION
RANGE ( ° C)
13.33
26.67
53.33
RR1-2
RR3-2
Bit 2
10
16
20
32
40
80
RR1-1
RR3-1
Bit 1
RR1-0
RR3-0
(LSb)
SMSC SCH311X
Bit 0
Datasheet
Default
Value
00h
00h

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