SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 268

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
24.2.27
Register
Address
AVG2
7Eh
0
0
0
1
Read/
Write
R/W
SFTR[7:5]
This is a read/write bit. Reading this bit has no effect. Writing this bit to ‘1’ may cause
unwanted results.
Bits [7:5]
The AVG[2:0] bits determine the amount of averaging for each of the measurements that are performed
by the hardware monitor before the reading registers are updated (TABLE 22). The AVG[2:0] bits are
priority encoded where the most significant bit has highest priority. For example, when the AVG2 bit
is asserted, 32 averages will be performed for each measurement before the reading registers are
updated regardless of the state of the AVG[1:0] bits.
Note: The default for the AVG[2:0] bits is ‘010’b.
Register 7Eh: Interrupt Enable 1 Register
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
This register is used to enable individual voltage error events to set the corresponding status bits in
the interrupt status registers. This register also contains the group voltage enable bit (Bit[0] VOLT),
which is used to enable voltage events to force the interrupt pin (nHWM_INT) low if interrupts are
enabled (see Bit[2] INTEN of the Special Function register at offset 7Ch).
This register contains the following bits:
Bit[0] Group interrupt Voltage Enable (VOLT)
0=Out-of-limit voltages do not affect the state of the nHWM_INT pin (default)
1=Enable out-of-limit voltages to make the nHWM_INT pin active low
Bit[1] VBAT Error Enable
Bit[2] 2.5V Error Enable
Bit[3] Vccp Error Enable
Bit[4] VTR Error Enable
Bit[5] 5V Error Enable
Bit[6] 12V Error Enable
Bit[7] VCC Error Enable
AVG1
X
0
0
1
Interrupt Enable 1 (Voltages)
AVG[2:0]
Register Name
AVG0
X
X
0
1
Table 24.17 AVG[2:0] BIT DECODER
REM DIODE 1
128
16
16
32
DATASHEET
(MSb)
Bit 7
VCC
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
252
Bit 6
12V
AVERAGES PER READING
Bit 5
5V
REM DIODE 2
Bit 4
VTR
128
16
16
32
VCCP
Bit 3
Bit 2
2.5V
INTERNAL DIODE
VBAT
Bit 1
16
32
8
1
(LSb)
VOLT
SMSC SCH311X
Bit 0
Datasheet
Default
Value
ECh