SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 26

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
4,44
8,28
101,
,72,
,43,
122
123
112
PIN
111
19-
91,
55,
73,
35
34
99
18
22
23
24
25
26
27
3
2.3,
NOTE
2.8
2.3
2.3
2.9
2.4
Table 2.4 SCH311X Pin Core Functions Description (
VTR
VBAT
VSS
AVSS
HVTR
HVSS
CLKI32
CLOCKI
LAD[3:0]
LFRAME
#
LDRQ#
PCI_RES
ET#
PCI_CLK
SER_IRQ
GP40/
DRVDEN
0
NAME
+3.3 Volt Standby Supply
Voltage
+3.0 Volt Battery Supply
Ground
Analog Ground
Analog Power. +3.3V
VTR pin dedicated to the
Hardware Monitoring
block. HVTR is
powered by +3.3V
Standby power VTR.
Analog Ground.
Internally connected to
all of the Hardware
Monitoring Block circuitry.
32.768kHz Trickle Clock
Input
14.318MHz Clock Input
Multiplexed Command
Address and Data
Frame signal. Indicates
start of new cycle and
termination of broken
cycle
Encoded DMA Request
PCI Reset
PCI Clock
Serial IRQ
General Purpose I/O
/Drive Density Select 0
DESCRIPTION
FDD INTERFACE (13)
LPC INTERFACE (9)
DATASHEET
CLOCK PINS (2)
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
10
)
PCI_RES
PCI_CLK
SER_IRQ
LAD[3:0]
LFRAME#
LDRQ#
ET#
GP40/
DRVDEN0
CLOCKI
POWER
PLANE
VCC
POWER
CLKI32
PLANE
Note 2.14
GP40
VTR-
) (continued)
GATE / Hi-Z
GATE/ Hi-Z
(Note
GATE / HI-
GATE/Hi-Z
NO GATE
GP40 NO
No Gate
OPERA-
VCC=0
GATE
GATE
TION
Z
2.16)
SMSC SCH311X
(I/O12/OD1
(O12/OD12
PCI_ICLK
(Note
BUFFER
MODES
PCI_IO
PCI_IO
PCI_O
PCI_I
PCI_I
Datasheet
2)/
IS
IS
)
2.1)