SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 304

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

Rev 0.2 (09-28-04)
KRST_GA20
Default = 0x00
on VCC POR,
VTR POR and
PCI RESET
Bits[6:5] reset on VTR
POR only
CLOCKI32
Default = 0x00 on VTR
POR
FDC on PP Mode
Register
Default = 0x00
on VCC POR,
VTR POR and
PCI RESET
NAME
NAME
Table 25.14 KYBD. Logical Device 7 [Logical Device Number = 0X07]
Table 25.15 Logical Device A [Logical Device Number = 0X0A]
REG INDEX
REG INDEX
0xF1 R/W
(R/W)
0xF0
0xF0
R/W
Bit[0] (CLK32_PRSN)
0 = 32kHz clock is connected to the CLKI32 pin (default)
1 = 32kHz clock is not connected to the CLKI32 pin (pin is
grounded)
Bit[1] SPEKEY_EN. This bit is used to turn the logic for the “wake
on specific key” feature on and off. It will disable the 32kHz clock
input to the logic when turned off. The logic will draw no power when
disabled.
0 = “Wake on specific key” logic is on (default)
1 = “Wake on specific key” logic is off
Bit[2] Reserved (read-only bit)
Reads return 0. Writes have no effect.
Bit[3] SPEMSE_EN
This bit is used to turn the logic for the “wake on specific mouse
click” feature on and off. It will disable the 32 Khz clock input to the
logic when turned off. The logic will draw no power when disabled.
0 = “wake on specific mouse click” logic is on (default)
1 = “wake on specific mouse click” logic is off
Bits[7:4] are reserved
FDC on PP Mode Register
Bit [1:0] Parallel Port FDC
00=Normal PP and FDC mode
01 =Mode 1 - Drive 0 on FDC, Drive 1 on PP
10 = Mode 2 - Drive 0/1 on PP
11 = Reserved
Bits[7:3] Reserved. Set to zero.
KRESET and GateA20 Select
Bit[7] Polarity Select for P12
= 0 P12 active low (default)
= 1 P12 active high
Bit[6] M_ISO. Enables/disables isolation of mouse signals into 8042.
Does not affect MDAT signal to mouse wakeup (PME) logic.
1= block mouse clock and data signals into 8042
0= do not block mouse clock and data signals into 8042
Bit[5] K_ISO. Enables/disables isolation of keyboard signals into
8042. Does not affect KDAT signal to keyboard wakeup (PME)
logic.
1= block keyboard clock and data signals into 8042
0= do not block keyboard clock and data signals into 8042
Bit[4] MLATCH
= 0 MINT is the 8042 MINT ANDed with Latched MINT (default)
= 1 MINT is the latched 8042 MINT
Bit[3] KLATCH
= 0 KINT is the 8042 KINT ANDed with Latched KINT (default)
= 1 KINT is the latched 8042 KINT
Bit[2] Port 92 Select
= 0 Port 92 Disabled
= 1 Port 92 Enabled
Bit[1] Reserved (read/write bit)
Bit[0] Reserved (read/write bit)
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
288
DEFINITION
DEFINITION
SMSC SCH311X
Datasheet