MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 105

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
INTERFACE
CONTROL
5.6.3
IDL2 OR GCI
INTERFACE
D out
D in
CONTROL PORT
AUTOMATIC eoc
CONTROLLER
INTERFACE &
PROCESSOR
CONTROLLER
AUTOMATIC
ACTIVATION
D CHANNEL
REGISTER
Superframe Framer-to-Deframer Loopback
A Superframe Framer–to–Deframer loopback is shown in Figure 5–36. As the shaded portion of the
block diagram shows, this loopback mode takes B and D channel data in at the D in pin and M channel
data via the SCP, performs all of the superframe framing and subsequent deframing functions, and
sends the same data back out the D out pin and SCP. This loopback mode is intended primarily for
diagnostic purposes.
Register BR14(b4) controls the Superframe Framer–to–Deframer Loopback mode. The loopback of
B, D, and M channel data occurs between the output of the Superframe Framer block of the
MC145572 and the Superframe Deframer input. In this loopback mode, the Tx Driver is disabled. A 1
written to BR14(b4) enables the mode and a 0 disables the mode. In addition, Match Scrambler
(BR8(b2)) and Receive Window Disable (BR8(b1)) should be set to a 1.
The procedure to enable the Superframe Framer–to–Deframer loopback for a single NT–configured
U–interface transceiver follows, with all numbers given in hexadecimal.
AND GCI
Figure 5–36. Superframe Framer
FIFO
FIFO
IDL2
Rx
Tx
BR8 = B7
Wait 5 seconds for the PLL to stabilize.
BR14 = 10
BR12 = 89
BR13 = 0C
NR2 = 1
2B + D
2B + D
SUPERFRAME
Freescale Semiconductor, Inc.
FRAMER
For More Information On This Product,
Match Polynomials, Receive Window Disable, set NT/LT Invert,
transmit Frame Control state SN3.
Enable Framer–to–Deframer Loopback, Enable CLKs. Enable CLKs is
optional and enables SYSCLK to display an Eye Pattern.
Control Steer, Hold Activation State, Force Linkup.
Accumulate DFE Output and Enable DFE Updates. Disable Echo
Cancellers.
Set Customer Enable.
SUPERFRAME
DEFRAMER
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MC145572
–
to
OSCILLATOR / PLL
–
Deframer Loopback Block Diagram
CRYSTAL
DAC
EQUALIZER
RECOVERY
FEEDBACK
DECISION
SLICER
TIMING
Tx FILTER
CANCELLER
FILTER
ECHO
ADC
Rx
-
XTAL in
XTAL out
DRIVER
Tx
INTERFACE
EXTERNAL
TxP
TxN
RxP
RxN
LINE
U INTERFACE
5–33