MC145572PB Freescale Semiconductor, MC145572PB Datasheet - Page 73

• Manufacturer Part Number: MC145572PB
• Manufacturer: Freescale Semiconductor

Specifications of MC145572PB

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
5.1
CONTROL PORT
CONTROLLER
INTERFACE &
PROCESSOR
CONTROLLER
ACTIVATION
AUTOMATIC
D CHANNEL
AUTOMATIC
FUNCTIONAL OVERVIEW
This chapter describes the operation of MC145572 when operated in the MCU mode.
A functional block diagram of the MC145572 U–interface transceiver is shown in Figure 5–1. This
device utilizes mixed analog and digital signal processing circuit technology to implement an adaptively
equalized echo cancelling full–duplex transmitter/receiver or transceiver.
REGISTER
The 2B+D data is input to the device at the D in pin of the time division multiplexed data interface.
This data is passed through a three–frame deep FIFO prior to being formatted and scrambled in the
Superframe Framer. The resulting 160 kbps binary data stream is converted to an 80 kbaud dibit
stream, which is subsequently converted to four analog amplitudes by the DAC (digital–to–analog
converter). The resulting pulse amplitude modulated signal is band limited by the Tx filter prior to enter-
ing the Tx driver, which differentially drives the line coupling circuit to the twisted wire pair.
From the twisted wire pair, information from the far–end U–interface transceiver is coupled through
the external line interface circuit to the differential receiver inputs RxP and RxN. (In this two–wire envi-
ronment, the transmitted signal is also coupled into the receiver inputs.) This combined analog signal
AND GCI
FIFO
FIFO
eoc
IDL2
Rx
Tx
2B + D
2B + D
SUPERFRAME
Freescale Semiconductor, Inc.
MCU MODE DEVICE FUNCTIONALITY
FRAMER
For More Information On This Product,
Figure 5–1. MC145572 Functional Block Diagram
DEFRAMER
Go to: www.freescale.com
SUPER-
FRAME
MC145572
OSCILLATOR / PLL
CRYSTAL
DAC
EQUALIZER
RECOVERY
FEEDBACK
DECISION
SLICER
TIMING
Tx FILTER
CANCELLER
FILTER
ECHO
ADC
Rx
-
XTAL in
XTAL out
DRIVER
Tx
TxP
TxN
INTERFACE
RxP
RxN
EXTERNAL
LINE
U INTERFACE
5
5–1